I’m an FPGA and Embedded Hardware Engineer focused on building efficient, high performance digital systems. I specialize in FPGA design, simulation, and hardware acceleration for AI and DSP applications using Verilog, VHDL, and RISC V architectures. I deliver verified, timing optimized RTL designs with complete simulation, testbenches, synthesis reports, and deployment ready documentation using Vivado, Quartus, ModelSim, and Vitis.... Read more