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I will architect and develop fpga, zynq soc, axi, dma and embedded linu
5+ years of experience in embedded systems design, PCB design, and product prototyping.
Design and implement embedded systems from scratch or upgrade existing systems.
Design PCBs for a variety of...
About this Gig
I provide senior-level FPGA and Zynq SoC development covering SystemVerilog RTL, custom IP, AXI4-Lite, AXI4-Stream, DMA, DDR, PS/PL integration, PetaLinux, timing closure, verification and ILA hardware debugging.
Projects can range from individual custom RTL blocks to complete embedded SoC architectures integrating ARM processors, programmable logic, high-speed streaming datapaths and external sensors/peripherals.
Other Electronics Engineering Services I Offer
FAQ
What FPGA and SoC platforms do you support?
I primarily work with AMD/Xilinx FPGA and Zynq platforms, including Zynq-7000 and Zynq UltraScale+ MPSoC. Other devices can be considered if the required toolchain, device files and project information are available.
Can you work on an existing Vivado or RTL project?
Yes. I can review, debug, extend or restructure existing Verilog/SystemVerilog RTL, Vivado projects, block designs, XDC constraints, custom IP and simulation environments.
Can you design a complete Zynq PS/PL system?
Yes. I can define PS/PL partitioning, integrate the Processing System, create custom PL hardware, connect AXI interfaces, configure clocks/resets, define register maps and prepare the hardware/software interface.
Do you develop custom AXI4-Lite or AXI4-Stream peripherals?
Yes. I can design AXI4-Lite control/status peripherals, AXI4-Stream datapaths and supporting register maps, FIFOs, interrupts and protocol handshaking logic.
Can you integrate DMA and DDR for high-speed data movement?
Yes. I can architect PL-to-DDR and DDR-to-PL data paths using AXI-Stream, AXI DMA, buffering and PS-attached DDR so large data transfers do not rely on the ARM CPU copying every word manually
Do you support PetaLinux and embedded Linux integration?
Yes. Where required, I can support XSA/BSP integration, device-tree configuration, Linux-visible FPGA peripherals, memory-mapped register access, boot integration and application-level control of PL hardware.
Can you interface sensors, ADCs, motors or communication modules?
Yes. Typical interfaces include SPI, I2C, UART, GPIO, ADC acquisition, PWM, encoders and custom digital interfaces. Please provide the device datasheets and electrical/interface requirements.
Do you perform synthesis, implementation and timing closure?
yes. I can perform synthesis, placement and routing, XDC constraint setup, setup/hold analysis, slack review, clock/CDC checks, utilization analysis and implementation-level timing closure
Can you help with FPGA-to-ASIC prototyping?
Yes. I can structure RTL and verification so the FPGA serves as a practical prototype for a later ASIC-oriented flow. The ASIC implementation flow is separate, but FPGA validation is useful for proving digital architecture and functionality before silicon.
