h
harin_maniyar

Maniyar

@harin_maniyar
5.0(1)

ASIC verification

India
Gujarati, English, Hindi
About me
I have hands-on experience in a wide range of digital design and verification projects using Verilog HDL. My expertise spans across Digital Electronics, Verilog HDL, System Verilog, UVM methodologies. I have successfully delivered design and verification solutions across multiple projects and recently worked on Gate-Level Simulations (GLS), enhancing my understanding of timing, netlist-level behavior, and real-world implementation aspects.... Read more

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harin_maniyar
Maniyar
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See my services

Programming & Tech
I will help to design rtl in verilog
5.0(1)
From$5 / projectMore details
Programming & Tech
I will help verifying complex design by developing sv, uvm testbench
From$10 / projectMore details

1 Reviews
5.0

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  • Seller communication level
    5
  • Recommend to a friend
    5
  • Service as described
    5
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    batshevapozner

    IL

    Israel

    5

    absolutely perfect, thank you so much!

    gig

    Programming & Tech

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