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$
USD
Turning Ideas into Innovative Tech Solutions
I will design, develop, simulate, and verify Verilog RTL projects for FPGA, ASIC, and VLSI applications. I can help with RTL design, testbenches, functional simulation, debugging, synthesis, FPGA implementation, and RTL-to-GDSII flow. You will receive clean, well-structured, and thoroughly tested Verilog code with professional documentation.
File format:
ODB
Software:
Matlab
•
NI Multisim
•
Simulink
•
AutoCAD
•
Arduino
•
CircuitMaker
Interface:
Wi-Fi