I will write a cocotb python testbench to verify your rtl

Huzaifa

Pakistan

I speak Urdu, English

RTL Verification and FPGA Design Engineer

ASIC Design and Verification Engineer with 3+ years of industry experience in RTL verification and timing closure, including a 12nm tape-out. I help hardware teams, startups and students verify digita...
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About this Gig

I write Python-based testbenches with cocotb for your Verilog, SystemVerilog or VHDL designs. It runs on free, open-source simulators like Verilator, so you pay for no tools.

What you get:

  • cocotb tests with drivers, monitors and a scoreboard
  • Checking against a Python reference model
  • Random and directed test cases
  • A Makefile so you can rerun everything with one command

I verify custom DSP and RISC-V vector datapaths at work with this approach. Send your RTL and a short description of the expected behavior.

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write a cocotb python testbench to verify your rtl
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write a cocotb python testbench to verify your rtl

Platform:

FPGA

Sensors:

Temperature

Expertise:

RTOS

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Debugging

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Microcontrollers

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ROS

•

Image processing

+2 more

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