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Muhib A
@muhib_17
Student
Bangladesh
English
About me
Hello! I am Muhib, an undergraduate student in Electronics and Communication Engineering with 3 years experience and expertise in Digital logic design , RTL design with Verilog HDL , Design Simulation. I enjoy designing digital circuits and understanding how modern electronic systems work from the logic level to hardware implementation.
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Muhib A
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Programming & Tech
I will design and simulate digital logic tasks, lab works projects
Programming & Tech
I will design and simulate verilog rtl projects for fpga
