I will design rtl, simulate rtl code, or use codex for design

United States

I speak English

Computer Engineering Student

I am a Computer Engineering student at UC Santa Barbara with hands-on knowledge of RTL design, simulation, and verification for FPGA and ASIC applications. I have experience developing and testing dig...
About this Gig

Are you looking for reliable RTL design, digital logic simulation, or PCB implementation support for your hardware project?

I offer custom engineering services for FPGA, ASIC, and embedded hardware applications. As a Computer Engineering student at UC Santa Barbara, I have hands-on experience designing, simulating, debugging, and verifying digital systems using SystemVerilog and Verilog.

My RTL services include:

Combinational and sequential logic design

Finite-state machines

AXI, UART, SPI, and I2C interfaces

Arbiters, counters, FIFOs, skid buffers, and datapaths

FPGA-oriented RTL modules

SystemVerilog testbenches

Functional simulation and waveform debugging

Code review, optimization, and bug fixing

Documentation and design explanations

My PCB services include:

Schematic capture

PCB layout and component placement

Basic power and signal routing

Bill of materials preparation

Gerber and manufacturing file generation

Review and debugging of existing PCB designs

I focus on creating clean, readable, and well-documented designs tailored to your requirements. Deliverables may include RTL source files, testbenches, simulation results, schematics, PCB files, and Gerber files

Platform:

FPGA

Sensors:

Temperature

Accelerometer

Ultrasonic

Expertise:

Firmware development

Debugging

Microcontrollers

AI