I will do schematics on cadence virtuoso, analog, digital ic design xcelium, genus

• I am a professional IC design engineer with 6+ years of experience with successful Tapeouts.
• I will design a CMOS VLSI Circuit which will include Schematics and Layouts using Cadence IC design tools.

Expertise:

1. Opamps circuits e.g., Two stage opamp, folded cascode, Telescopic opamps according to given requirements
2. Linear Voltage regulator (LDO)
3. DC-DC Converters
4. Bandgap References (BGR) and Start-up circuits
5. Gain Boosting and CMFB in folded cascode Amplifiers
6. Residue Amplifiers for Pipelined ADC
7. Static as well as Dynamic Comparators circuits
8. Charge Pump and voltage multiplier circuits
9. Oscillators (VCO)
10. PLL Design (Frac-N, Integer, Multiphase)
11. Clock Monitor
12. Frequency Synthesizers and Multipliers
13. Power on Reset, Voltage Buffer Design
14. ADC (SAR, Flash, Pipeline, Sigma-Delta)
15. DAC (R-2R, Current)
16. RF Circuits (LNA, PA, Filter, Mixer, WIFI802.11ac, 802.11ad,5G, LTE)
17. Analog Front End AFE

Services:

1. Transistor-level CMOS implementation
2. Schematics and Layout
3. Symbol generation
4. DRC Check
5. LVS Check
6. Output Graphs
7. Report Writing

Tools:

1. Cadence Virtuoso
2. Calibre
3. LTspice
4. ADS
5. Proteus